Advances in the reduction of device geometries of integrated circuits has created a high demand for improved microfabrication techniques and materials. Presently available processing methods can define dimensions as small as 1 to 1.5 micrometers, and even smaller geometries are desired. Improvements in dry etching and lithography, however, have already reduced the dimensions of high density VLSI circuits to the point where significant impediments to this quest are already apparent.
For example, the use of polycrystalline silicon (poly-Si), the most common gate electrode and interlayer interconnect material in present use in LSI-MOS devices, is a significant problem. Although poly-Si has many desirable properties such as good etchability, good oxidation characteristics, mechanical stability at high temperatures, excellent step coverage and adhesion, it has the major drawback of having a relatively high resistance. For most applications a sheet resistance of 20-30 ohms/square, the typical sheet resistance of a 5000 Angstrom layer of heavily doped poly-Si, is not a major contraint in circuit design. However, for VLSI designs, resistance of this magnitude does become a major constraint, since large VLSI circuits require long thin lines, resulting in unacceptable RC-time constraints and thereby limiting high speed performance at very reduced geometries. As a result, it appears that further improvement in MOS circuit design will depend on the development of more advanced interconnect technology.
As a replacement for poly-Si interconnects, refractory metals and refractory metal silicides appear to be attractive candidates and have been under recent investigation. Refractory metals, e.g. tungsten, typically have lower bulk resistance than poly-Si, but generally have poor oxidation characteristics and are easily etched in hydrogen peroxide/sulfuric acid, a common cleaner used in the semiconductor industry. In addition, they exhibit poor adhesion after annealing, especially on silicon dioxide. Hence, they have met with limited acceptance at the present time. Refractory metal silicides, on the other hand, although they have higher bulk resistivities than refractory metals themselves, generally have excellent oxidation resistance and exhibit other properties which make them compatible with I.C. wafer processing. For example, silicides have demonstrated stability over I.C. wafer processing temperatures, good adhesion, good chemical resistance and good dry etching characteristics.
Several approaches have been used to form these silicides, but each has met with significant problems. Co-evaporation has tended to produce films with marginal step coverage and significant shrinkage during anneal, the latter causing adhesion problems. Cosputtered films have resulted in better step coverage but a significant amount of argon is included in the films and there is significant shrinkage during anneal. Sputtered films from pressed silicide targets appear to minimize shrinkage, but oxygen, carbon, and argon contamination have generally resulted in films with inferior properties such as high bulk resistivities.
Even though some CVD systems have shown limited success, the reported compounds have exhibited a rough surface and have been columnar, bonded, or modular structures, or have been in the form of dust particles. (See "Formation of W.sub.x Si.sub.1-x by plasma chemical vapor deposition," Appl. Phys. Lett. 39(5), 1 Sept. 1981, by K. Akitmoto and K. Watanabe.)
For the particular situation of tungsten silicide the deposition typically results from reduction of tungsten hexafluoride in silane in a standard quartz or vycor tube reactor. Generally, reactions at the substrate surface are thought to be as follows: EQU SiH.sub.4 .fwdarw.Si+4H EQU WF.sub.6 +6H.fwdarw.W+6HF
and EQU W+Si.fwdarw.WSi.sub.2 EQU 7W+3WSi.sub.2 .fwdarw.2W.sub.5 Si.sub.3.
(See "A CVD Study of the Tungsten-Silicon System", by Jyh-Shuey Lo, et al., Proc. of the 4th International Conference on CVD, pp. 74-83.) Also, in most hot wall systems some gas phase reactions are likely as well, and can cause serious deleterious effects, particularly formation of dust particles which can contaminate the wafers.
Part of the problem in depositing these silicides in a thermally driven process stems from the very reactive nature of silane in tungsten hexafluoride and leads to very high surface reaction rates. In addition, the stoichiometry of compounds formed has tended to be rich in tungsten, and therefore unstable when subjected to subsequent processing ambients. The reactions proceed very quickly and at reduced deposition temperatures, so that the results are difficult to control both as to thickness and uniformity. Furthermore, they proceed not just on the desired substrate surfaces, but on other available surfaces in the reaction chamber, making control even more difficult and eventually contributing particulates which can contaminate the wafers on which deposition is desired.
Some of these problems in the deposition of tungsten silicide have been solved using a newly developed cold wall deposition system, the details of which are provided in U.S. patent application Ser. No. 480,030, U.S. Pat. No. 4,565,157, "METHOD AND APPARATUS FOR DEPOSITION OF TUNGSTEN SILICIDES", which is assigned to Genus, Inc. of Mountain View, Calif. filed Mar. 29, 1983, by Daniel L. Brors, et al., and which is hereby incorporated by reference. With that system, resulting films are generally of high quality, and are silicon rich, typically being represented by the formula WSi.sub.x, where x can be varied between 2.0 and 4.0. These films exhibit good step coverage, 85% over a vertical step, and bulk resistivities of generally less than 75 micro-ohm cm can be obtained when wafers are annealed at 1000 degrees C. for 10 minutes, and less than 50 micro-ohm cm when annealed at 1100 degrees C. for 10 minutes. Before annealing, however, bulk resistivity is much higher, typically of the order of 500 to 800 micro-ohm cm. Such an annealing process is undesirable in systems which are sensitive to thermal cycling, such as the shallow junctions in VSLI circuitry. Annealing also can cause warpage in large wafers.
Hence, even with recent developments in the quality of silicide films, the current industrial requirements for films having low resistivity, excellent step coverage, good adhesion to semiconductor substrates and oxides, good oxidation resistance, and which do not require annealing have not been met.